The invention relates to voltage generator circuits for use with digital logic or memory circuits, and in particular to voltage generator circuits which are radiation hardened by circuit design.
There are many applications in which LSI circuits are used in environments which are subject to various type of radiation. The radiation affects various device parameters so as to limit the operational range of the circuit. For example, LSI random access memory circuits are only operable up to a radiation dose equal to 5.times.10.sup.3 rads [Si] total dose, or 3.times.10.sup.9 rads/sec [Si] transient dose rate.
Various process techniques are known for achieving integrated circuit radiation hardening, and some small capacity RAMs have been specifically designed and fabricated to withstand high radiation levels. The drawback of such known radiation hardened circuits is their relatively small storage capacity (for example 64 bits) per chip, their access time and the degree of radiation hardness.
There are various known circuit techniques for providing an MOS voltage generator. These techniques include a resistance divider circuit, a source follower circuit, and an MOS divider circuit. There are disadvantages associated with each of these prior art circuits for providing an MOS voltage generator which makes such approaches unsuitable for use in a radiation environment. The resistance divider circuit, for example, has a large layout size, only fair accuracy, and relatively high power dissipation. Moreover the output voltage of the resistance divider depends on variations in resistivity, length, and width.
The source follower circuit generally permits the output voltage to equal the threshold voltage, however it operates very slowly, provides very small current when its output voltage approaches the threshold voltage, and moreover the threshold voltage is not necessarily equal to the maximum threshold voltage of the driven devices after irradiation takes place.
The MOS divider circuit has a number of problems which also makes it unsuitable for the intended application in a radiation environment. The output voltage depends upon a number of independent device parameters such as the threshold voltage V.sub.T, the drain-to-source voltage V.sub.DS, the gate-to-source voltage V.sub.GS the width/length ration W/L, the parameter K'=.mu.(.sup..epsilon. ox/.sup.T ox) (where .mu. is the charge carrier mobility, .sub..epsilon. ox the dielectric constant of the gate insulating layer and .sup.T ox the thickness of the gate insulating layer), the leakage current, the body effect factor BE=.+-.(.sup.T ox/.sup..epsilon. ox) .sqroot.2q.epsilon..sub.s N (where q is the electronic charge, .epsilon..sub.s the dielectric constant of silicon, and N the concentration of dopant atoms in the silicon substrate), resistivity and supply voltage V.sub.DD. Moreover the accuracy of such a circuit is very poor, and no fairly large scale change in th supply voltage is allowed. There is relatively high power dissipation and slow operation in the saturation region. Furthermore the output voltage does not vary with the threshold voltage variations resulting from nuclear radiation MOS processing, temperature and voltage biasing effects.
In view of the above noted disadvantages, prior to the present invention there has not been an MOS voltage generator which provides considerable immunity to ionizing radiation degradation by tracking the maximum threshold voltage shifts occurring on an MOS circuit.